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? 2010 microchip technology inc. ds22189b-page 1 mcp6061/2/4 features ? low offset voltage: 150 v (maximum) ? low quiescent current: 60 a (typical) ? rail-to-rail input and output ? wide supply voltage range: 1.8v to 6.0v ? gain bandwidth product: 730 khz (typical) ? unity gain stable ? extended temperature range: -40c to +125c ? no phase reversal applications ? automotive ? portable instrumentation ? sensor conditioning ? battery powered systems ? medical instrumentation ? test equipment ? analog filters design aids ? spice macro models ?filterlab ? software ? microchip advanced part selector (maps) ? analog demonstration and evaluation boards ? application notes typical application description the microchip technology inc. mcp6061/2/4 family of operational amplifiers (op amps) has low input offset voltage ( 150 v, maximum) and rail-to-rail input and output operation. this family is unity gain stable and has a gain bandwidth product of 730 khz (typical). these devices operate with a single supply voltage as low as 1.8v, while drawing low quiescent current per amplifier (60 a, typical). these features make the family of op amps well suited for single-supply, high precision, battery-powered applications. the mcp6061/2/4 family is offered in single (mcp6061), dual (mcp6062), and quad (mcp6064) configurations. the mcp6061/2/4 is designed with microchip?s advanced cmos process. all devices are available in the extended temperature range, with a power supply range of 1.8v to 6.0v. package types r l v out gyrator z in r c z in r l j l + = lr l rc = mcp6061 * includes exposed t hermal pad (ep); see table 3-1 . 1 2 3 4 8 7 6 5 ep 9 v dd v out nc nc v in + v in ? v ss nc 1 2 3 4 8 7 6 5 ep 9 v outb v inb ? v inb + v dd v ina + v ina ? v ss v outa v ina + v ina ? v dd 1 2 3 4 14 13 12 11 v outa v outd v ind ? v ind + v ss v inb + 5 10 v inc + v inb ? 6 9 v outb 7 8 v outc v inc ? v ina + v ina ? v ss 1 2 3 4 8 7 6 5 v outa v dd v outb v inb ? v inb + v in + v in ? v ss 1 2 3 4 8 7 6 5 nc nc v dd v out nc mcp6061 soic mcp6062 soic mcp6061 2x3 tdfn * mcp6062 2x3 tdfn * mcp6064 soic, tssop v in + v in ? v ss 1 2 3 5 4 v dd v out mcp6061 sot-23-5 60 a, high precision op amps
mcp6061/2/4 ds22189b-page 2 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 3 mcp6061/2/4 1.0 electrical characteristics 1.1 absolute maximum ratings ? v dd ? v ss ........................................................................7.0v current at input pins .....................................................2 ma analog inputs (v in + , v in - )?? .......... v ss ? 1.0v to v dd + 1.0v all other inputs and outputs ......... v ss ? 0.3v to v dd + 0.3v difference input voltage ...................................... |v dd ? v ss | output short-circuit current .................................continuous current at output and supply pins ............................30 ma storage temperature ....................................-65c to +150c maximum junction temperature (t j ) .......................... +150c esd protection on all pins (hbm; mm) ................ 4 kv; 400v ? notice: stresses above those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. ?? see 4.1.2 ?input voltage limits? 1.2 specifications dc electrical specifications electrical characteristics : unless otherwise indicated, v dd = +1.8v to +6.0v, v ss = gnd, t a = +25c, v cm = v dd /2, v out v dd /2, v l = v dd /2 and r l = 10 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions input offset input offset voltage v os -150 ? +150 v v dd = 3.0v, v cm = v dd /3 input offset drift with temperature v os / t a ?1.5?v/ct a = -40c to +85c, v dd = 3.0v, v cm = v dd /3 v os / t a ?4.0?v/ct a = +85c to +125c, v dd = 3.0v, v cm = v dd /3 power supply rejection ratio psrr 70 87 ? db v cm = v ss input bias current and impedance input bias current i b ? 1.0 100 pa i b ?60?pat a = +85c i b ? 1100 5000 pa t a = +125c input offset current i os ? 1.0 ? pa common mode input impedance z cm ?10 13 ||6 ? ||pf differential input impedance z diff ?10 13 ||6 ? ||pf common mode common mode input voltage range v cmr v ss ? 0.15 ? v dd +0.15 v v dd = 1.8v ( note 1 ) v cmr v ss ? 0.3 ? v dd +0.3 v v dd = 6.0v ( note 1 ) common mode rejection ratio cmrr 72 89 ? db v cm = -0.15v to 1.95v, v dd = 1.8v 74 91 ? db v cm = -0.3v to 6.3v, v dd = 6.0v 72 87 ? db v cm = 3.0v to 6.3v, v dd = 6.0v 74 89 ? db v cm = -0.3v to 3.0v, v dd = 6.0v note 1: figure 2-13 shows how v cmr changed across temperature.
mcp6061/2/4 ds22189b-page 4 ? 2010 microchip technology inc. ac electrical specifications temperature specifications open-loop gain dc open-loop gain (large signal) a ol 95 115 ? db 0.2v < v out <(v dd -0.2v) v cm = v ss output maximum output voltage swing v ol, v oh v ss +15 ? v dd ?15 mv 0.5v input overdrive output short-circuit current i sc ?6?mav dd = 1.8v ?27?mav dd = 6.0v power supply supply voltage v dd 1.8 ? 6.0 v quiescent current per amplifier i q 30 60 90 a i o = 0, v dd = 6.0v v cm = 0.9v dd dc electrical specifications (continued) electrical characteristics : unless otherwise indicated, v dd = +1.8v to +6.0v, v ss = gnd, t a = +25c, v cm = v dd /2, v out v dd /2, v l = v dd /2 and r l = 10 k to v l . (refer to figure 1-1 ). parameters sym min typ max units conditions note 1: figure 2-13 shows how v cmr changed across temperature. electrical characteristics: unless otherwise indicated, t a = +25c, v dd = +1.8 to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. (refer to figure 1-1 ). parameters sym min typ max units conditions ac response gain bandwidth product gbwp ? 730 ? khz phase margin pm ? 61 ? g = +1 v/v slew rate sr ? 0.25 ? v/s noise input noise voltage e ni ? 4.5 ? vp-p f = 0.1 hz to 10 hz input noise voltage density e ni ?25?nv/ hz f = 10 khz input noise current density i ni ?0.6?fa/ hz f = 1 khz electrical characteristics: unless otherwise indicated, v dd = +1.8v to +6.0v and v ss = gnd. parameters sym min typ max units conditions temperature ranges operating temperature range t a -40 ? +125 c note 1 storage temperature range t a -65 ? +150 c thermal package resistances thermal resistance, 5l-sot-23 ja ? 220.7 ? c/w thermal resistance, 8l-2x3 tdfn ja ?52.5?c/w thermal resistance, 8l-soic ja ? 149.5 ? c/w thermal resistance, 14l-soic ja ? 95.3 ? c/w thermal resistance, 14l-tssop ja ? 100 ? c/w note 1: the internal junction temperature (t j ) must not exceed the absolute maximum specification of +150c.
? 2010 microchip technology inc. ds22189b-page 5 mcp6061/2/4 1.3 test circuits the circuit used for most dc and ac tests is shown in figure 1-1 . this circuit can independently set v cm and v out ; see equation 1-1 . note that v cm is not the circuit?s common mode voltage ((v p +v m )/2), and that v ost includes v os plus the effects (on the input offset error, v ost ) of temperature, cmrr, psrr and a ol . equation 1-1: figure 1-1: ac and dc test circuit for most specifications. g dm r f r g ? = v cm v p v dd 2 ? + () 2 ? = v out v dd 2 ? () v p v m ? () v ost 1g dm + () ++ = where: g dm = differential mode gain (v/v) v cm = op amp?s common mode input voltage (v) v ost = op amp?s total input offset voltage (mv) v ost v in? v in+ ? = v dd r g r f v out v m c b2 c l r l v l c b1 100 k 100 k r g r f v dd /2 v p 100 k 100 k 60 pf 10 k 1f 100 nf v in? v in+ c f 6.8 pf c f 6.8 pf mcp606x
mcp6061/2/4 ds22189b-page 6 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 7 mcp6061/2/4 2.0 typical performance curves note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-1: input offset voltage with v dd = 3.0v. figure 2-2: input offset voltage drift with v dd = 3.0v and t a +85c. figure 2-3: input offset voltage drift with v dd = 3.0v and t a +85c. figure 2-4: input offset voltage vs. common mode input voltage with v dd = 6.0v. figure 2-5: input offset voltage vs. common mode input voltage with v dd = 3.0v. figure 2-6: input offset voltage vs. common mode input voltage with v dd = 1.8v. note: the graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. the performance characteristics listed herein are not tested or guaranteed. in some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 -150 -120 -90 -60 -30 0 30 60 90 120 150 input offset voltage (v) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd /3 0 0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 -20 -16 -12 -8 -4 0 4 8 12 16 20 input offset drift with temperature (v/c) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd /3 t a = -40c to +85c 0 0.03 0.06 0.09 0.12 0.15 0.18 0.21 0.24 0.27 -20 -16 -12 -8 -4 0 4 8 12 16 20 input offset drift with temperature (v/c) percentage of occurences 1244 samples v dd = 3.0v v cm = v dd /3 t a = +85c to +125c -750 -600 -450 -300 -150 0 150 300 450 600 750 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input offset voltage (v) t a = -40c t a = +25c v dd = 6.0v representative part t a = +85c t a = +125c -750 -600 -450 -300 -150 0 150 300 450 600 750 -0.5 -0.2 0.1 0.4 0.7 1.0 1.3 1.6 1.9 2.2 2.5 2.8 3.1 3.4 common mode input voltage (v) input offset voltage (v) t a = -40c t a = +25c v dd = 3.0v representative part t a = +85c t a = +125c -750 -600 -450 -300 -150 0 150 300 450 600 750 -0.5 -0.3 -0.1 0.1 0.3 0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3 common mode input voltage (v) input offset voltage (v) t a = +85 c t a = +125c t a = -40 c t a = +25c v dd = 1.8v representative part
mcp6061/2/4 ds22189b-page 8 ? 2010 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-7: input offset voltage vs. output voltage. figure 2-8: input offset voltage vs. power supply voltage. figure 2-9: input noise voltage density vs. frequency. figure 2-10: input noise voltage density vs. common mode input voltage. figure 2-11: cmrr, psrr vs. frequency. figure 2-12: cmrr, psrr vs. ambient temperature. -350 -250 -150 -50 50 150 250 350 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 output voltage (v) input offset voltage (v) v dd = 6.0v v dd = 1.8v v dd = 3.0v representative part -750 -600 -450 -300 -150 0 150 300 450 600 750 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 power supply voltage (v) input offset voltage (v) t a = +125c t a = +85c t a = +25c t a = -40c representative part 10 100 1,000 0.1 1 10 100 1000 10000 100000 frequency (hz) input noise voltage density (nv/ hz) 0.1 1 10 100 1k 10k 100k 0 5 10 15 20 25 30 35 40 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) input noise voltage density (nv/ hz) f = 10 khz v dd = 6.0v 20 30 40 50 60 70 80 90 100 110 10 100 1000 10000 100000 1000000 frequency (hz) cmrr, psrr (db) 10 100 1k 10k 100k 1m cmrr psrr+ psrr- representative part 60 65 70 75 80 85 90 95 100 105 110 -50 -25 0 25 50 75 100 125 ambient temperature (c) cmrr,psrr (db) psrr (v dd = 1.8v to 6.0v, v cm = v ss ) cmrr (v dd = 6.0v, v cm = -0.3v to 6.3v)
? 2010 microchip technology inc. ds22189b-page 9 mcp6061/2/4 note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-13: common mode input voltage range limit vs. ambient temperature. figure 2-14: input bias, offset currents vs. ambient temperature. figure 2-15: input bias current vs. common mode input voltage. figure 2-16: quiescent current vs ambient temperature with v cm = 0.9v dd . figure 2-17: quiescent current vs. power supply voltage with v cm = 0.9v dd . figure 2-18: open-loop gain, phase vs. frequency. -0.35 -0.30 -0.25 -0.20 -0.15 -0.10 -0.05 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 -50-250 255075100125 ambient temperature (c) common mode input voltage range limit (v) v cmr_l - v ss @ v dd = 1.8v v ol - v ss @ v dd = 3.0v v ol - v ss @ v dd = 6.0v v cmr_h - v oh @ v dd = 6.0v @ v dd = 3.0v @ v dd = 1.8v 1 10 100 1000 10000 25 45 65 85 105 125 ambient temperature (c) input bias and offset currents (pa) v dd = 6.0v v cm = v dd input bias current input offset current 1 10 100 1000 10000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 common mode input votlage (v) input bias current (pa) v dd = 6.0v t a = +125c t a = +85c 30 35 40 45 50 55 60 65 70 75 80 85 -50 -25 0 25 50 75 100 125 ambient temperature (c) quiescent current (ua/amplifier) v dd = 6.0v v cm = 0.9v dd v dd = 1.8v v cm = 0.9v dd 0 10 20 30 40 50 60 70 80 90 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 power supply voltage (v) quiescent current (ua) v dd = 6.0v v cm = 0.9v dd t a = +125c t a = +85c t a = +25c t a = -40c -20 0 20 40 60 80 100 120 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 1.0e+07 frequency (hz) open-loop gain (db) -210 -180 -150 -120 -90 -60 -30 0 open-loop phase () open-loop gain open-loop phase v dd = 6.0v 0.1 1 10 100 1k 10k 100k 1m 10m
mcp6061/2/4 ds22189b-page 10 ? 2010 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-19: dc open-loop gain vs. power supply voltage. figure 2-20: dc open-loop gain vs. output voltage headroom. figure 2-21: channel-to-channel separation vs. frequency (mcp6062/4 only). figure 2-22: gain bandwidth product, phase margin vs. common mode input voltage. figure 2-23: gain bandwidth product, phase margin vs. ambient temperature. figure 2-24: gain bandwidth product, phase margin vs. ambient temperature. 100 105 110 115 120 125 130 135 140 145 150 1.52.02.53.03.54.04.55.05.56.0 power supply voltage (v) dc-open loop gain (db) r l = 10 k ? v ss + 0.2v < v out < v dd - 0.2v 100 105 110 115 120 125 130 135 140 145 150 0.00 0.05 0.10 0.15 0.20 0.25 output voltage headroom (v) dc-open loop gain (db) v dd = 6.0v v dd = 1.8v large signal a ol 80 90 100 110 120 130 140 1.0e+02 1.0e+03 1.0e+04 1.0e+05 1.0e+06 frequency (hz) channel to channel separation (db) 100 1k 10k 100k 1m input referred frequency (hz) 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 common mode input voltage (v) gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () phase margin gain bandwidth product v dd = 6.0v 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 -50 -25 0 25 50 75 100 125 ambient temperature () gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () v dd = 6.0v phase margin gain bandwidth product 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 -50 -25 0 25 50 75 100 125 ambient temperature () gain bandwidth product (mhz) 0 20 40 60 80 100 120 140 160 180 phase margin () v dd = 1.8v phase margin gain bandwidth product
? 2010 microchip technology inc. ds22189b-page 11 mcp6061/2/4 note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-25: output short circuit current vs. power supply voltage. figure 2-26: output voltage swing vs. frequency. figure 2-27: ratio of output voltage headroom to output current vs. output current. figure 2-28: output voltage headroom vs. ambient temperature. figure 2-29: slew rate vs. ambient temperature. figure 2-30: small signal non-inverting pulse response. 0 5 10 15 20 25 30 35 40 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 power supply voltage (v) output short circuit current (ma) t a = -40c t a = +25c t a = +85c t a = +125c 0.1 1 10 100 1000 10000 100000 1000000 frequency (hz) output voltage swing (v p-p ) v dd = 1.8v v dd = 6.0v 100 1k 10k 100k 1m 10 15 20 25 30 35 40 45 50 55 60 65 0.1 1 10 output current (ma) ratio of output headroom to current (mv/ma) (v ol - v ss )/(-i out ) (v dd - v oh )/i out v dd = 1.8v (v dd - v oh )/i out (v ol - v ss )/(-i out ) v dd = 60v 0 2 4 6 8 10 12 14 16 -50 -25 0 25 50 75 100 125 ambient temperature (c) output voltage headroom (mv) v dd - v oh v ol - v ss 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 -50 -25 0 25 50 75 100 125 ambient temperature (c) slew rate (v/s) falling edge, v dd = 6.0v falling edge, v dd = 1.8v rising edge, v dd = 6.0v rising edge, v dd = 1.8v time (2 s/div) output voltage (20 mv/div) v dd = 6.0v g = +1 v/v
mcp6061/2/4 ds22189b-page 12 ? 2010 microchip technology inc. note: unless otherwise indicated, t a = +25c, v dd = +1.8v to +6.0v, v ss = gnd, v cm = v dd /2, v out v dd /2, v l = v dd /2, r l = 10 k to v l and c l = 60 pf. figure 2-31: small signal inverting pulse response. figure 2-32: large signal non-inverting pulse response. figure 2-33: large signal inverting pulse response. figure 2-34: the mcp6061/2/4 shows no phase reversal. figure 2-35: closed loop output impedance vs. frequency. figure 2-36: measured input current vs. input voltage (below v ss ). time (2 s/div) output voltage (20 mv/div) v dd = 6.0v g = -1 v/v -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 time (0.02 ms/div) output voltage (v) v dd = 6.0v g = +1 v/v -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 time (0.02 ms/div) output voltage (v) v dd = 6.0v g = -1 v/v -1.0 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 time (0.1 ms/div) output voltage (v) v dd = 6.0v g = +2 v/v v out v in 1 10 100 1000 10 100 1000 10000 100000 1000000 frequency (hz) closed loop output impedance ( ? ) g n : 101 v/v 11 v/v 1 v/v 10 100 1k 10k 100k 1m 1.e-12 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 1.e-05 1.e-04 1.e-03 -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 v in (v) -i in (a) 1m 100 10 1 100n 10n 1n 100 10 1p t a = -40c t a = +25c t a = +85c t a = +125c
? 2010 microchip technology inc. ds22189b-page 13 mcp6061/2/4 3.0 pin descriptions descriptions of the pins are listed in table 3-1 . table 3-1: pin function table 3.1 analog outputs the output pins are low-impedance voltage sources. 3.2 analog inputs the non-inverting and inverting inputs are high- impedance cmos inputs with low bias currents. 3.3 power supply pins the positive power supply (v dd ) is 1.8v to 6.0v higher than the negative power supply (v ss ). for normal operation, the other pins are at voltages between v ss and v dd . typically, these parts are used in a single (positive) supply configuration. in this case, v ss is connected to ground and v dd is connected to the supply. v dd will need bypass capacitors. 3.4 exposed thermal pad (ep) there is an internal electrical connection between the exposed thermal pad (ep) and the v ss pin; they must be connected to the same potential on the printed circuit board (pcb).frequency (hz) mcp6061 mcp6062 mcp6064 symbol description soic sot-23-5 2x3 tdfn soic 2x3 tdfn soic, tssop 61 611 1v out , v outa analog output (op amp a) 24 222 2v in ?, v ina ? inverting input (op amp a) 33 333 3v in +, v ina + non-inverting input (op amp a) 75 788 4 v dd positive power supply ?? ? 5 5 5 v inb + non-inverting input (op amp b) ?? ? 6 6 6 v inb ? inverting input (op amp b) ?? ? 7 7 7 v outb analog output (op amp b) ?? ??? 8 v outc analog output (op amp c) ?? ??? 9 v inc ? inverting input (op amp c) ?? ??? 10 v inc + non-inverting input (op amp c) 42 444 11 v ss negative power supply ?? ??? 12 v ind + non-inverting input (op amp d) ?? ??? 13 v ind ? inverting input (op amp d) ?? ??? 14 v outd analog output (op amp d) 1, 5, 8 ? 1, 5, 8 ? ? ? nc no internal connection ? ? 9 ? 9 ? ep exposed thermal pad (ep); must be connected to v ss .
mcp6061/2/4 ds22189b-page 14 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 15 mcp6061/2/4 4.0 application information the mcp6061/2/4 family of op amps is manufactured using microchip?s state-of-the-art cmos process and is specifically designed for low-power, high precision applications. 4.1 rail-to-rail input 4.1.1 phase reversal the mcp6061/2/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. figure 2-34 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 input voltage limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see section 1.1 ?absolute maximum ratings ?? ). the esd protection on the inputs can be depicted as shown in figure 4-1 . this structure was chosen to protect the input transistors and to minimize input bias current (i b ). figure 4-1: simplified analog input esd structures. the input esd diodes clamp the inputs when they try to go more than one diode drop below v ss . they also clamp any voltages that go well above v dd ; their break- down voltage is high enough to allow normal operation, but not low enough to protect against slow over-voltage (beyond v dd ) events. very fast esd events (that meet the spec) are limited so that damage does not occur. in some applications, it may be necessary to prevent excessive voltages from reaching the op amp inputs. figure 4-2 shows one approach to protecting these inputs. figure 4-2: protecting the analog inputs. a significant amount of current can flow out of the inputs when the common mode voltage (v cm ) is below ground (v ss ). see figure 2-36 . 4.1.3 input current limits in order to prevent damage and/or improper operation of these amplifiers, the circuit must limit the voltages at the input pins (see section 1.1 ?absolute maximum ratings ?? ). figure 4-3 shows one approach to protecting these inputs. the resistors r 1 and r 2 limit the possible cur- rents in or out of the input pins (and the esd diodes, d 1 and d 2 ). the diode currents will go through either v dd or v ss . figure 4-3: protecting the analog inputs. 4.1.4 normal operation the input stage of the mcp6061/2/4 op amps use two differential input stages in parallel. one operates at a low common mode input voltage (v cm ), while the other operates at a high v cm . with this topology, the device operates with a v cm up to 300 mv above v dd and 300 mv below v ss . (see figure 2-13 ).the input offset voltage is measured at v cm = v ss ?0.3v and v dd + 0.3v to ensure proper operation. the transition between the input stages occurs when v cm is near v dd ?1.1v (see figures 2-4 , 2-5 and figure 2-6 ). for the best distortion performance and gain linearity, with non-inverting gains, avoid this region of operation. bond pad bond pad bond pad v dd v in + v ss input stage bond pad v in ? v 1 v dd d 1 v 2 d 2 mcp606x v out u 1 v 1 r 1 v dd d 1 min(r 1 ,r 2 )> v ss ?min (v 1 ,v 2 ) 2ma min(r 1 ,r 2 )> max(v 1 ,v 2 )?v dd 2ma v 2 r 2 d 2 mcp606x v out u 1
mcp6061/2/4 ds22189b-page 16 ? 2010 microchip technology inc. 4.2 rail-to-rail output the output voltage range of the mcp6061/2/4 op amps is v ss + 15 mv (minimum) and v dd ? 15 mv (maximum) when r l =10k is connected to v dd /2 and v dd = 6.0v. refer to figures 2-27 and 2-28 for more information. 4.3 capacitive loads driving large capacitive loads can cause stability problems for voltage feedback op amps. as the load capacitance increases, the feedback loop?s phase margin decreases and the closed-loop bandwidth is reduced. this produces gain peaking in the frequency response, with overshoot and ringing in the step response. while a unity-gain buffer (g = +1) is the most sensitive to capacitive loads, all gains show the same general behavior. when driving large capacitive loads with these op amps (e.g., > 100 pf when g = +1), a small series resistor at the output (r iso in figure 4-4 ) improves the feedback loop?s phase margin (stability) by making the output load resistive at higher frequencies. the bandwidth will be generally lower than the bandwidth with no capacitance load. figure 4-4: output resistor, r iso stabilizes large capacitive loads. figure 4-5 gives recommended r iso values for different capacitive loads and gains. the x-axis is the normalized load capacitance (c l /g n ), where g n is the circuit's noise gain. for non-inverting gains, g n and the signal gain are equal. for inverting gains, g n is 1+|signal gain| (e.g., -1 v/v gives g n = +2 v/v). figure 4-5: recommended r iso values for capacitive loads. after selecting r iso for your circuit, double-check the resulting frequency response peaking and step response overshoot. modify r iso ?s value until the response is reasonable. bench evaluation and simulations with the mcp6061/2/4 spice macro model are very helpful. 4.4 supply bypass with this family of operational amplifiers, the power supply pin (v dd for single-supply) should have a local bypass capacitor (i.e., 0.01 f to 0.1 f) within 2 mm for good high frequency performance. it can use a bulk capacitor (i.e., 1 f or larger) within 100 mm to provide large, slow currents. this bulk capacitor can be shared with other analog parts. 4.5 unused op amps an unused op amp in a quad package (mcp6064) should be configured as shown in figure 4-6 . these circuits prevent the output from toggling and causing crosstalk. circuit a sets the op amp at its minimum noise gain. the resistor divider produces any desired reference voltage within the output voltage range of the op amp; the op amp buffers that reference voltage. circuit b uses the minimum number of components and operates as a comparator, but it may draw more current. figure 4-6: unused op amps. v in r iso v out c l ? + mcp606x 1 10 100 1000 10000 1.e-11 1.e-10 1.e-09 1.e-08 1.e-07 1.e-06 normalized load capacitance; c l /g n (f) recommended r iso ( ? ) g n : 1 v/v 2 v/v 5 v/v v dd = 6.0 v r l = 10 k ? v dd v dd r 1 r 2 v dd v ref v ref v dd r 2 r 1 r 2 + -------------------- = ? mcp6064 (a) ? mcp6064 (b)
? 2010 microchip technology inc. ds22189b-page 17 mcp6061/2/4 4.6 pcb surface leakage in applications where low input bias current is critical, printed circuit board (pcb) surface leakage effects need to be considered. surface leakage is caused by humidity, dust or other contamination on the board. under low humidity conditions, a typical resistance between nearby traces is 10 12 . a 5v difference would cause 5 pa of current to flow; which is greater than the mcp6061/2/4 family?s bias current at +25c (1.0 pa, typical). the easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). the guard ring is biased at the same voltage as the sensitive pin. an example of this type of layout is shown in figure 4-7 . figure 4-7: example guard ring layout for inverting gain. 1. non-inverting gain and unity-gain buffer: a) connect the non-inverting pin (v in +) to the input with a wire that does not touch the pcb surface. b) connect the guard ring to the inverting input pin (v in ?). this biases the guard ring to the common mode input voltage. 2. inverting gain and transimpedance gain amplifiers (convert current to voltage, such as photo detectors): a) connect the guard ring to the non-inverting input pin (v in +). this biases the guard ring to the same reference voltage as the op amp (e.g., v dd /2 or ground). b) connect the inverting pin (v in ?) to the input with a wire that does not touch the pcb surface. guard ring v in ?v in + v ss
mcp6061/2/4 ds22189b-page 18 ? 2010 microchip technology inc. 4.7 application circuits 4.7.1 gyrator the mcp6061/2/4 op amps can be used in gyrator applications. the gyrator is an electric circuit which can make a capacitive circuit behave inductively. figure 4-8 shows an example of a gyrator simulating inductance, with an approximately equivalent circuit below. the two z in have similar values in typical applications. the primary application for a gyrator is to reduce the size and cost of a system by removing the need for bulky, heavy and expensive inductors. for example, rlc bandpass filter characteristics can be realized with capacitors, resistors and operational amplifiers without using inductors. moreover, gyrators will typically have higher accuracy than real inductors, due to the lower cost of precision capacitors than inductors. . figure 4-8: gyrator. 4.7.2 instrumentation amplifier the mcp6061/2/4 op amps are well suited for conditioning sensor signals in battery-powered applications. figure 4-9 shows a two op amp instrumentation amplifier, using the mcp6062, that works well for applications requiring rejection of common mode noise at higher gains. the reference voltage (v ref ) is supplied by a low impedance source. in single supply applications, v ref is typically v dd /2. figure 4-9: two op amp instrumentation amplifier. to obtain the best cmrr possible, and not limit the performance by the resistor tolerances, set a high gain with the r g resistor. 4.7.3 precision comparator use high gain before a comparator to improve the latter?s input offset performance. figure 4-10 shows a gain of 11 v/v placed before a comparator. the reference voltage v ref can be any value between the supply rails. figure 4-10: precision, non-inverting comparator. r l v out gyrator z in r c z in r l j l + = lr l rc = r l l z in equivalent circuit mcp6061 v out v 1 v 2 ? () 1 r 1 r 2 ----- - 2r 1 r g --------- ++ ?? ?? v ref + = v ref r 1 r 2 r 2 r 1 v out r g v 2 v 1 ? mcp6062 ? mcp6062 v in 1m v out 100 k mcp6541 v ref mcp6061
? 2010 microchip technology inc. ds22189b-page 19 mcp6061/2/4 5.0 design aids microchip provides the basic design tools needed for the mcp6061/2/4 family of op amps. 5.1 spice macro model the latest spice macro model for the mcp6061/2/4 op amps is available on the microchip web site at www.microchip.com . the model was written and tested in official orcad (cadence) owned pspice. for the other simulators, it may require translation. the model covers a wide aspect of the op amp's electrical specifications. not only does the model cover voltage, current, and resistance of the op amp, but it also covers the temperature and noise effects on the behavior of the op amp. the model has not been verified outside of the specification range listed in the op amp data sheet. the model behaviors under these conditions can not be guaranteed that it will match the actual op amp performance. moreover, the model is intended to be an initial design tool. bench testing is a very important part of any design and cannot be replaced with simulations. also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. 5.2 filterlab ? software microchip?s filterlab ? software is an innovative software tool that simplifies analog active filter (using op amps) design. available at no cost from the microchip web site at www.microchip.com/filterlab , the filterlab design tool provides full schematic diagrams of the filter circuit with component values. it also outputs the filter circuit in spice format, which can be used with the macro model to simulate actual filter performance. 5.3 microchip advanced part selector (maps) maps is a software tool that helps semiconductor professionals efficiently identify microchip devices that fit a particular design requirement. available at no cost from the microchip website at www.microchip.com/ maps , the maps is an overall selection tool for microchip?s product portfolio that includes analog, memory, mcus and dscs. using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparison reports. helpful links are also provided for data sheets, purchase, and sampling of microchip parts. 5.4 analog demonstration and evaluation boards microchip offers a broad spectrum of analog demonstration and evaluation boards that are designed to help you achieve faster time to market. for a complete listing of these boards and their corresponding user?s guides and technical information, visit the microchip web site at www.microchip.com/ analogtools . some boards that are especially useful are: ? mcp6xxx amplifier evaluation board 1 ? mcp6xxx amplifier evaluation board 2 ? mcp6xxx amplifier evaluation board 3 ? mcp6xxx amplifier evaluation board 4 ? active filter demo board kit ? 5/6-pin sot-23 evaluation board, p/n vsupev2 ? 8-pin soic/msop/tssop/ dip evaluation board, p/n soic8ev ? 14-pin soic/tssop/dip evaluation board, p/n soic14ev 5.5 application notes the following microchip analog design note and application notes are available on the microchip web site at www.microchip. com/appnotes and are recommended as supplemental reference resources. ? adn003: ?select the right operational amplifier for your filtering circuits?, ds21821 ? an722: ?operational amplifier topologies and dc specifications?, ds00722 ? an723: ?operational amplifier ac specifications and applications?, ds00723 ? an884: ?driving capacitive loads with op amps?, ds00884 ? an990: ?analog sensor conditioning circuits ? an overview?, ds00990 ? an1177: ?op amp precision design: dc errors?, ds01177 ? an1228: ?op amp precision design: random noise?, ds01228 ? an1332: ?current sensing circuit concepts and fundamentals? , ds01332 these application notes and others are listed in the design guide: ? ?signal chain design guide?, ds21825
mcp6061/2/4 ds22189b-page 20 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 21 mcp6061/2/4 6.0 packaging information 6.1 package marking information 8-lead soic (150 mil) (mcp6061, mcp6062) example: xxxxxxxx xxxxyyww nnn mcp6061e sn^^ 1044 256 legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e 3 e example: ahc 044 25 8-lead 2x3 tdfn (mcp6061, mcp6062) xxx yww nn 5-lead sot-23 (mcp6061) xxnn example: yg25
mcp6061/2/4 ds22189b-page 22 ? 2010 microchip technology inc. package marking information (continuation) 14-lead tssop ( mcp6064 ) example: 14-lead soic (150 mil) ( mcp6064 ) example: xxxxxxxxxxx yywwnnn xxxxxxxx yyww nnn mcp6064 e 1044 256 xxxxxxxxxxx mcp6064 1044256 e/sl^^ 3 e
? 2010 microchip technology inc. ds22189b-page 23 mcp6061/2/4 n b e e1 d 1 2 3 e e1 a a1 a2 c l l1
mcp6061/2/4 ds22189b-page 24 ? 2010 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2010 microchip technology inc. ds22189b-page 25 mcp6061/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6061/2/4 ds22189b-page 26 ? 2010 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2010 microchip technology inc. ds22189b-page 27 mcp6061/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6061/2/4 ds22189b-page 28 ? 2010 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2010 microchip technology inc. ds22189b-page 29 mcp6061/2/4
mcp6061/2/4 ds22189b-page 30 ? 2010 microchip technology inc. note 1 n d e e1 1 23 b e a a1 a2 l l1 c h h
? 2010 microchip technology inc. ds22189b-page 31 mcp6061/2/4
mcp6061/2/4 ds22189b-page 32 ? 2010 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2010 microchip technology inc. ds22189b-page 33 mcp6061/2/4 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp6061/2/4 ds22189b-page 34 ? 2010 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2010 microchip technology inc. ds22189b-page 35 mcp6061/2/4 appendix a: revision history revision b (december 2010) the following is the list of modifications: 1. added new sot-23-5 package type for mcp6061 device. 2. corrected figures 2-13 , 2-22 , 2-23 , 2-24 and 2-28 in section 2.0 ?typical performance curves? . 3. modified tab l e 3 - 1 to show the pin column for mcp6061, sot-23-5 package. 4. updated section 4.1.2 ?input voltage limits? . 5. added section 4.1.3 ?input current limits? . 6. added new document item in section 5.5 ?application notes? . 7. updated the package markings information and drawings. 8. updated the product identification system page. revision a (june 2009) ? original release of this document.
mcp6061/2/4 ds22189b-page 36 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 37 mcp6061/2/4 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . part no. - x /xx package temperature range device device: mcp6061: single op amp mcp6061t: single op amp (tape and reel) (soic, sot-23 and 2x3 tdfn) mcp6062: dual op amp mcp6062t: dual op amp (tape and reel) (soic and 2x3 tdfn) mcp6064: quad op amp mcp6064t: quad op amp (tape and reel) (soic and tssop) temperature range: e = -40c to +125c package: mny * = plastic dual flat, no lead, (2x3 tdfn) 8-lead ot = plastic small outline transistor (sot-23), 5-lead sl = plastic soic (150 mil body), 14-lead sn = plastic soic, (150 mil body), 8-lead st = plastic tssop (4.4mm body), 14-lead * y = nickel palladium gold manufacturing designator. only available on the tdfn package. examples: a) mcp6061t-e/ot: tape and reel, 5ld sot-23 pkg b) mcp6061-e/sn: 8ld soic pkg c) mcp6061t-e/sn: tape and reel, 8ld soic pkg d) mcp6061t-e/mny: tape and reel, 8ld 2x3 tdfn pkg a) mcp6062-e/sn: 8ld soic pkg b) mcp6062t-e/sn: tape and reel, 8ld soic pkg c) mcp6062t-e/mny: tape and reel 8ld 2x3 tdfn pkg a) mcp6064-e/sl: 14ld soic pkg b) mcp6064t-e/sl: tape and reel, 14ld soic pkg c) mcp6064-e/st: 14ld tssop pkg d) mcp6064t-e/st: tape and reel, 14ld tssop pkg
mcp6061/2/4 ds22189b-page 38 ? 2010 microchip technology inc. notes:
? 2010 microchip technology inc. ds22189b-page 39 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, appl ication maestro, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip tec hnology incorporated in the u.s.a. and other countries. sqtp is a service mark of microchip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2010, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-60932-731-6 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified.
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